The present invention relates to a signal processor for decoding and/or encoding digital communication signals and, more particularly, to a programmable signal processor which efficiently decodes sequential codes by the Viterbi algorithm.
Over the past few decades, electronic communications have been increasingly implemented by digital signals. To preserve the integrity of the communication channels, various forms of coding have been studied. One generalized and useful type of coding is sequential coding including trellis codes, convolutional codes, partial response coded data channels and some compression methods. Sequential decoders for codes and channels with memory have been studied for many years, and many dedicated high speed architectures for such decoders have been created for specific codes.
However, the programming of the Viterbi and other sequential decoding algorithms on general purpose computers or digital signal processors is highly inefficient for almost all trellis codes, convolutional codes and partial response coded data channels. Though apparently straight-forward, the programming of the Viterbi and other sequential decoding algorithms is not readily executable. The large amounts of memory access operations and calculations to find the survivor trace render the implementation of these algorithms inefficient in general purpose computers having the standard arithmetic-logic-unit architecture.
With the increasing use of digital communications there has been a growing interest in the application of sequential decoding to various fields, including digital subscriber lines, voiceband modems, digital mobile radio, digital satellite transmissions, and speech and audio compression.
Thus there is an increasing need for a signal processor which may be used in a wide range of applications. Such a signal processor should be able to handle the different sequential codes in the various applications in contrast to the specialized processor architectures that have been created for specific codes. The present invention addresses this need and provides for a programmable signal processor which decodes various sequential codes in a highly efficient manner.